Fraunhofer EMFT CMOS-Line

Lithography in the Fraunhofer EMFT CMOS-line
© Fraunhofer EMFT / Bernd Müller
Lithography in the Fraunhofer EMFT CMOS-line

Diffusion Processes

Oxidation Building up of SiO2 layers, 4 nm to 3 µm thick, through wet or dry oxidation, optionally with HCl, in temperature range of 650 °C to 1250 °C. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in horizontal oven Tempress TS8603. Tempress AtmoScan system is available for thin oxide layers.
Diffusion Introduction of dopants, activating implantations, and spreading of BPSG layers in an inert or oxidizing atmosphere in temperature range of 650 °C to 1250 °C. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in horizontal oven Tempress TS8603.
RTP (Rapid Thermal Processing) Producing thin oxide layers, RNO layers, activating implantations, as well as silicidation. 200 mm wafers can be processed. The processing takes place in Mattson 2900RTP equipment.

Layer Deposition

Poly- and amorphous silicon LPCVD (Low Pressure Chemical Vapor Deposition) layer deposition of undoped polysilicon or amorphous silicon 50 nm to 3 µm thick in temperature range of 450 °C to 650 °C. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in horizontal oven Tempress TS8603.
TEOS LPCVD-oxide LPCVD (Low Pressure Chemical Vapor Deposition) layer deposition of silicon oxides 20 nm to 800 nm thick in temperature range of 450 °C to 650 °C. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in horizontal oven Tempress TS8603.
LPCVD-nitride LPCVD (Low Pressure Chemical Vapor Deposition) layer deposition of silicon nitride 20 nm to 250 nm thick in temperature range of 700 °C to 800 °C. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in horizontal oven Tempress TS8603.
Doped poly-silicon In-situ phosphor-doped poly-silicon 30 nm to 6 µm thick in temperature range of 400 °C to 800 °C. 200 mm wafers can be processed. The processing takes place in Altatech Alta-CVD.
Doped oxides Deposition of BSG (Boron-Silicate Glass), PSG (Phosphor Silicate Glass) and BPSG (Boron-Phosphor Silicate Glass) for thickness of 50 nm to 2 µm in temperature range of 300 °C to 460 °C. 200 mm wafers can be processed. The processing takes place in Altatech Alta-CVD.
PECVD-oxide PECVD (Plasma-Enhanced Chemical Vapor Deposition) of USG (Undoped Silicate Glass) for thickness of 30 nm to 3 µm in temperature range of 200 °C to 480 °C. 200 mm wafers can be processed. The processing takes place in AMAT P5000 CVD chambers (TEOS or SiH4) or in Altatech Alta-CVD.
Ozon-TEOS SACVD SACVD (Sub-Atmospheric Chemical Vapor Deposition) of silicon oxide layers 100 nm to 800 nm thick in temperature range of 300 °C to 480 °C. 200 mm wafers can be processed. The processing takes place in AMAT P5000 CVD chambers or in Altatech Alta-CVD.
PECVD-nitride PECVD (Plasma Enhanced Chemical Vapor Deposition) of nitride layers 50 nm to 800 nm thick in temperature range of 300 °C to 400 °C. 200 mm wafers can be processed. The processing takes place in AMAT P5000 CVD chambers.

Metallization

Sputtering of AlSi, Ti, TiN Deposition of AlSi, Ti and TiN in temperature range of 50 °C to 400 °C. The layer thickness can be customized according to individual needs. The layers can be combined at will. 200 mm wafers can be processed. The processing takes place in Oerlikon Clusterline 200.
MOCVD for TiN and CVD for tungsten

MOCVD (Metal-Organic Chemical Vapor Deposition) of highly compliant and insitu-compressed TiN layers 8 nm to 60 nm thick in temperature range of 340 °C to 430 °C. TDMAT is used as precursor.

CVD (Chemical Vapor Deposition) of highly compliant wolfram layers 100 nm to 800 nm thick in temperature range of 380 °C to 430 °C. WF6 is used as precursor. Can be combined in-situ with TiN MOCVD, including back-etching of the tungsten and TiN layers (TSV-metallization).

200 mm wafers can be processed. The processing takes place in AMAT P5000 multi-chamber system.

Lithography

Spin-on / spray coating and development i-Line-resist technology for coatings 700 nm to 10 µm thick. Before coating the wafers can be prepared with HMDS, in order to improve the adhesion of the coating on the substrate. 200 mm wafers can be processed. The processing takes place completely automatically in SÜSS Gamma.
i-Line-lithography Exposure of photo-sensitive layers at minimal lateral resolution of 0.35 µm. Maximum size of the exposure field 20 mm to 21 mm. 200 mm wafers can be processed. The exposure is done with i-Line-stepper Canon FPA 3000 i4.  
Contact and proximity lithography Exposure of i-Line-sensitive photoresist. The required 1:1 transfer of the structure of the shadow mask can be carried out using the requested distance (proximity) or with contact. Chrome masks are used. In addition to the standard incident light microscope, IR optics can be used for aligning the mask and the substrate. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in the contact exposure device SÜSS MICROTEC MA8Gen3.
Double-sided exposure Adjusted exposure of the back side of the substrate with adjustment accuracy in 2 µm range. Wafer sizes 150 mm and 200 mm can be processed. The processing takes place in the contact exposure device SÜSS MICROTEC MA8Gen3.
Electron beam lithography Writing of structures smaller than 10 nm. Existing GDSII and CIF files can be read by the software and consequently utilized for structuring. After development the structure sizes can be specifically targeted and analyzed (REM capabilities). Wafer sizes of 100 mm, 150 mm and 200 mm can be processed. The processing takes place in Raith 150-TWO.

Dry-chemical Etching

Reactive ion etching of conductive layers (AlSi, Ti, TiN, W) TiN/AlSi/TiN/Ti structures up to 0.6 µm in width at metal thickness up to 1.5 µm (depending on the structure size) are possible. Additionally RIE-tungsten etching, structured and unstructured (W-Etchback). 200 mm wafers can be processed. The processing takes place in P5000 Mark 2 from Applied Materials (AMAT Centura) with an ASP chamber (Advanced Strip and Passivation).
High-rate silicon etching (Bosch process) Deep Reactive Ion-Etching (DRIE) of bulk silicon with Bosch process for aspect ratios up to 20:1. Etching of MEMS structures with low aspect ratio at silicon etching rate of 10 µm/min to 20 µm/min (depending on the structure size). Etching of TSV (Through Silicon Vias) with aspect ratios  up to 20:1 at a silicon etching rate of 2 µm/min to 5 µm/min (depending on the structure size). Additionally, silicon etching with single-step-process is available. Wafers sizes of 200 mm can be processed. The processing takes place in SPTS Pegasus. 

Wet Chemical Processes

Wafer cleaning Cleaning of wafers using bench processes and Spray Acid Tool infrastructure SAT 508 IT from Semitool. Effective removal of organic and non-organic contaminations (SC1, SC2, Caro’s acid and HF-Dip). Residues of coating and polymers can be removed using acetone, isopropanol and EKC-265 in stainless steel basin with ultrasound. Wafer sizes of 150 mm and 200 mm can be processed.
Mechanical wafer cleaning Mechanical removal of particles on wafers by brushing with various cleaning media. Wafer sizes of 200 mm can be processed. The processing takes place in Scrubber Ontrac DSS 200.
Isotropic etching processes

Structuring wet chemical etching with photoresist is possible for the following layers: poly-silicon, doped and undoped oxides as well as aluminium (Alu, AlSi and AlSiCu).

An unstructured wet chemical removal of the following layers is possible: poly-silicon, doped and undoped oxides, silicon-nitride, titan-nitride, titan, tungsten and aluminium as well as aluminium alloys.

Wafer sizes of 150 mm and 200 mm can be processed.

Spin-etching processes Silicon etching and stress-relief etching using a mixture of nitric acid, phosphoric acid and hydrofluoric acid. Silicon oxide etching using hydrofluoric acid. Both  processes can be used for the front as well as the backside of the wafer. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in Spin Processor SEZ 203. 

Ion Implantation

Ionenimplantation Implantation of argon, hydrogen, arsenic, boron, fluor, BF2 and phosphor in doses range from 1 x 1011 cm² to 1 x 1016 cm². The energy range is 5 keV to 250 keV for single charged ions. Additionally, implantation of up to three times charged ions with energies up to 750 keV is possible. Furthermore, the implantation angle of 0° to 45° as well as rotation of 0° to 360° can be realized. Wafer sizes of 100 mm, 150 mm and 200 mm can be processed. All implantations take place in VARIAN E500 medium current implanter.

Epitaxy

Epitaxy of Si and SiGe layers Epitaxy of silicon and silicon-germanium layers in the RP-CVD Reactor (6 Torr to Atm). A low doping with boron and phosphor is possible, as well as deposition of highly intrinsic silicon (3000 Ohm cm). Wafer sizes of 200 mm can be processed. The processing takes place in ASM Epsilon 2000.
Low temperature epitaxy Epitaxial deposition of silicon and silicon-germanium. The layer deposition and surface cleaning take place at temperatures of 450 °C and above. Wafer sizes of 200 mm can be processed. The processing takes place in equipment developed by the company Muegge especially for this purpose.

Chemical Mechanical Polishing (CMP)

Chemical Mechanical Polishing (CMP) Polishing of layers of oxide, silicon and polysilicon with IPEC AVANTI 472. Processing of copper with IPEC-Westech 372M. Wafer sizes of 150 mm and 200 mm can be processed.

Mechanical Grinding

Mechanical grinding Grinding of silicon wafers or wafer stacks from 100 µm to maximum 2000 µm thick. Special carrier technologies make grinding of topographic wafers, processing of extreme thin MEMS wafer stacks, back-side grinding of cavities, or thinning of wafers down to 30 µm possible. Wafer sizes of 150 mm and 200 mm can be processed. The processing takes place in Disco DFG 850 and DFG 8540 equipment.

In-line Process Analysis

Atomic Force Microscope (AFM) Measurement of surface roughness and step height of max. 5.5 µm. Samples up to the size of 200 mm can be measured. The measuring takes place in the Atomic Force Microscope (AFM) D(imension)5000 from Digital Instruments.
In-line REM and Focused Ion Beam In-line REM (Schottky Emitter) and Focused Ion Beam (Ga-FIB) with EDX-analysis and Gas Injection System (GIS). Wafer sizes of 100 mm, 150 mm and 200 mm can be processed. The processing takes place in FEI Helios Nanolab 650.
Measurement of layer thickness Ellipsometric thickness measurement of thin and transparent materials. Wafer sizes of 150 mm and 200 mm can be processed. The measurement takes place in KLA Tencor UV1280. Spectrometric thickness measurement of silicon layers thinner than 100 µm and layers permeable for infrared light. Sample sizes of 150 mm and 200 mm can be processed. The processing takes place in OMT.
X-Ray Diffraction (XRD) X-Ray Diffraction (XRD) including reflectometry, especially for measuring the silicon-germanium concentration and the relaxation. Wafer sizes of 200 mm can be processed. The processing takes place in Philips XPert PRO, model MRD XL.
Measurement of wafer thickness (contactless, capacitive) Thickness measurement of silicon wafers or wafer stacks. The measurement range lies between 400 µm and 1400 µm. Additionally, the waferbow and layer stress can be determined. Wafer sizes of 150 mm and 200 mm can be processed. The measurement takes place in Eichhorn and Hausmann MX 203-8.

These technologies in a CMOS-line are available at Fraunhofer EMFT for your application topics. We look forward to hearing from you!

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