Chip Testing

Semiconductor devices are crucial in the digital world and form the basis of many technical devices. As performance increases, the challenges caused by more complex and smaller designs also increase. To ensure the correct functionality of the devices during development and in series production, electrical verification and comprehensive characterization under variable conditions are essential.

An essential aspect is the testability of the components, which is ensured by targeted design measures (design for testability). The key to success is close cooperation between circuit design and test engineering.

Prof. Rainer Holmer from OTH Regensburg complements Fraunhofer EMFT's research portfolio in the field of test development for chips and systems. His research activities focus on the development of new technologies and solutions for semiconductor testing. These include parametric and functional verification, characterization, qualification, and productive testing of discrete semiconductor components and integrated circuits at the wafer and component level. Other key areas include design for testability, test development, test optimization (particularly with regard to test time and test costs), and test automation.

Perspectively, development of a comprehensive test strategy for post-silicon verification is planned – the testing and validation of semiconductor designs after the silicon chips have been manufactured. Also  characterization and productive testing of chiplet systems and 2.5/3D hybrid integrated systems as part of the APECS pilot line and their implementation on a professional test system are on the roadmap.

Do you want to learn more about our expertise in test development, verification, and characterization of chiplets, chips, and systems?

Then get in touch with us!