Recently, researchers have begun to employ emerging non-volatile memories (eNVM) for storing the weights in artificial neural networks (ANNs) as programmable electrical properties, such as electrical conductance. Simultaneously, an analog multiply-accumulate (MAC) operation utilizes the electrical properties of eNVMs for multiplication, while accumulating currents or charges at the output. This leads to a high degree of parallelism in the multiplications and minimizes the need for data movement associated with the weights. Unfortunately, analog operation suffers from circuit nonideality, noise, and process variation, which result in limited computational precision. Improving the throughput and energy efficiency of analog neuromorphic chips while maintaining computational precision without compromising other aspects of performance presents a significant challenge.
As part of the project, Fraunhofer EMFT researchers are focusing on the development of energy-efficient analog and mixed-signal neuromorphic hardware using ferroelectric field-effect transistors (FeFET) and static random access memories (SRAM). The primary goal is to achieve optimum computing accuracy. Thanks to the team's profound expertise in chip development and in the creation of hardware-based AI algorithms and demonstrators for image recognition, energy-efficient, application-specific neuromorphic chips for mobile and wearable sensor systems can be produced.The project is funded by the EU under funding code 826655 as part of the ECSEL initiative and by the BMBF under funding code 16ESE0407.