Power-saving chips for neuromorphic computing

Neuromorphic computing is considered a key technology for future AI applications. The sophisticated nerve network of our human brain serves as a model. A central challenge for research is the very high energy consumption of chips for the required complex processing power. Within the ECSEL project TEMPO (Technology & Hardware for Neuromorphic Computing) the German consortium with participation of Fraunhofer EMFT is working on the development and evaluation of power-saving neuromorphic computing chips in the 22nm FDSOI technology node.

© Sikov - stock.adobe.com

The researchers use new integrated memory technologies in innovative concepts for the realization of analog and digital neuromorphic circuits. Memory and chip development is driven through all levels of exploitation from applied research to IP generation and integrated systems. The chips designed and manufactured in the project are to be used primarily for classification tasks in image recognition systems, e.g. for autonomous driving, as well as for processing further sensor data, e.g. from radar systems.

© Fraunhofer EMFT/ Bernd Müller
Deep learning algorithm verification for neuromorphic hardware implementation

Within the project, the contributions of Fraunhofer EMFT focus on the development of key IPs for analog and mixed-signal signal processing for neuromorphic structures. The goal is to develop signal processing for existing mobile and portable sensor systems that allows a reduction of power consumption by several orders of magnitude.

The project is funded by the EU under funding code 826655 as part of the ECSEL initiative and by the BMBF under funding code 16ESE0407.



You might also be interested in:

Offering: IC-design and layout

Boosting the Internet of Things' energy efficiency

Energy efficient neuromorphic Computing