Circuit Design for Neuromorphic Computing

Artificial intelligence (AI) has developed rapidly in recent years, empowered by the continuously increasing computation power. Nevertheless, implementing advanced AI algorithms on the sensors at the edge for everyday applications now faces the problem of lacking sufficient computation capability with limited power consumption. Circuit Design for Neuromorphic Computing might provide a solution to this problem, which cannot be tackled by the conventional von Neumann architecture. 

Designing chips for neuromorphic computing
© Fraunhofer EMFT / Bernd Müller
Designing chips for neuromorphic computing

In neuromorphic computing, moving the computation units close to the memory storage enables data processing near- or even in-memory, thus improving energy efficiency by preventing massive data movement.  Further improvement of energy efficiency is achieved by the use of spiking neural networks (SNN), which process the signals in an event-based fashion and demonstrate outstanding potential for performing the classification tasks directly in the sensor at the edge.

Combining Near-/In-Memory Computing and SNN to achieve a useable intelligent sensor platform faces various software and hardware challenges. The Fraunhofer EMFT circuit design group tackles these challenges by offering circuit design for neuromorphic computing including:

  • design and characterization of CIM-based mixed-signal AI accelerators with emerging non-volatile memories (eNVM)
  • scalable digital-on-top SNN hardware architectures for massive-parallel concurrent processing of mixed-signal spiking neurons with custom digital circuits
  • co-simulation of AI software and target hardware 

These competences in chip design for neuromorphic computing are available at Fraunhofer EMFT for your application topics. We look forward to hearing from you!

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Service Offering: IC Design and Layout


Neuromorphic Computing


Technology Offering: Chip Design Prototyping Lab

Project: Next Generation Computing in the Edge

Project: Power-saving Chips for Neuromorphic Computing