In neuromorphic computing, moving the computation units close to the memory storage enables data processing near- or even in-memory, thus improving energy efficiency by preventing massive data movement. Further improvement of energy efficiency is achieved by the use of spiking neural networks (SNN), which process the signals in an event-based fashion and demonstrate outstanding potential for performing the classification tasks directly in the sensor at the edge.
Combining Near-/In-Memory Computing and SNN to achieve a useable intelligent sensor platform faces various software and hardware challenges. The Fraunhofer EMFT circuit design group tackles these challenges by offering circuit design for neuromorphic computing including:
- design and characterization of CIM-based mixed-signal AI accelerators with emerging non-volatile memories (eNVM)
- scalable digital-on-top SNN hardware architectures for massive-parallel concurrent processing of mixed-signal spiking neurons with custom digital circuits
- co-simulation of AI software and target hardware