Innovative thin silicon chip development

Extremely thin silicon chips are required for 3D heterogeneous integration and chip-in-foil packages. The technological know-how for the production of thin wafers provides an important foundation for this. Fraunhofer EMFT is well equipped for the extensive process sequence of thinning technology, so that arbitrarily thin devices can be realized at wafer level. Applications for very thin semiconductor components include 3D IC integration, flexible electronics for sensors on the body, and extremely flat sensor systems for predictive maintenance of plants, machinery and buildings.

Fraunhofer EMFT offers the patented "dicing-by-thinning" process as a chip separation technology for very thin semiconductor wafers. The technologies available at Fraunhofer EMFT allow flexible silicon chips with a thickness of 10 - 30 μm to be realized. Handling such extremely thin silicon wafers presents particular challenges. Techniques and aids for the safe handling of thin silicon, e.g. electrostatic carrier systems (e-carrier and e-foil), are also part of Fraunhofer EMFT's expertise. E-carrier systems also enable backside processing of extremely thin and fragile semiconductor substrates.

Through many years of research into the production of very thin semiconductor substrates, Fraunhofer EMFT has built up in-depth expertise and methods for the mechanical and electrical characterization of thin silicon chips. 

Leverage our expert thin silicon chip development at Fraunhofer EMFT for your specific application needs. We are eager to collaborate and innovate with you - contact us!